A lithographic process is one that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. comprising part of, one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. Stepping and/or scanning movements can be involved, to repeat the pattern at successive target portions across the substrate. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
In lithographic processes, it is desirable frequently to make measurements of the structures created, e.g., for process control and verification. Various tools for making such measurements are known, including scanning electron microscopes, which are often used to measure critical dimension (CD), and specialized tools to measure overlay (the accuracy of alignment between patterns formed in different patterning steps, for example between two layers in a device) and defocus of the lithographic apparatus. Recently, various forms of scatterometers have been developed for use in the lithographic field. These devices direct a beam of radiation onto a target and measure one or more properties of the scattered radiation—e.g., intensity at a single angle of reflection as a function of wavelength; intensity at one or more wavelengths as a function of reflected angle; or polarization as a function of reflected angle—to obtain a “spectrum” from which a property of interest of the target can be determined. Determination of the property of interest may be performed by various techniques: e.g., reconstruction of the target structure by iterative approaches such as rigorous coupled wave analysis or finite element methods; library searches; and principal component analysis.
Methods and apparatus for determining structure parameters are, for example, disclosed in WO 20120126718. Methods and scatterometers are also disclosed in US20110027704A1, US2006033921A1 and US2010201963A1. The targets used by such scatterometers are relatively large, e.g., 40 μm by 40 μm, gratings and the measurement beam generates an illumination spot that is smaller than the grating (i.e., the grating is underfilled). In addition to scatterometry to determine parameters of a structure made in one patterning step, the methods and apparatus can be applied to perform diffraction-based overlay measurements.
Diffraction-based overlay metrology using dark-field image detection of the diffraction orders enables overlay measurements on smaller targets. These targets can be smaller than the illumination spot and may be surrounded by product structures on a wafer. Multiple targets can be measured in one image. Examples of dark-field imaging metrology can be found in international patent applications US2010328655 A1 and US2011069292 A1 which documents are hereby incorporated by reference in their entirety. Further developments of the technique have been described in published patent publications US20110027704A, US20110043791A, US20120044470A US20120123581A, US20130258310A, US20130271740A and WO2013178422A1. The above documents generally describe measurement of overlay though measurement of asymmetry of targets. Methods of measuring dose and focus of a lithographic apparatus using asymmetry measurements are disclosed in documents WO2014082938 A1 and US2014/0139814A1, respectively. The contents of all the mentioned applications are also incorporated herein by reference. The invention is not limited in application to any particular type of inspection apparatus, or even to inspection apparatuses generally.
One way of improving the performance of an inspection apparatus, is to increase the numerical aperture of the optical system. Increasing the numerical aperture of a system also decreases the depth of focus of the optical system. It is therefore necessary to increase the precision of focus control of the optical system, which in turn increases the risk of incorrectly focusing the optical system.
Furthermore, integrated circuits consist of increasing numbers of layers. Each layer increases the height of the structure of the integrated circuit. Additionally, certain types of circuits, such as 3D NAND memory structures or DRAM memory structures, may be oriented vertically rather than horizontally. Accordingly, the height variation of such structures may be significantly more than the depth of focus of existing metrology systems. As metrology targets typically consist of two target structures that are positioned in different layers of a particular product structure, the distance between two target structures of a metrology target typically increases proportionally with any increase in overall height of the integrated circuit structure.
In order to perform accurate metrology measurements, it is necessary to ensure that the metrology targets are correctly in focus of the optical system. The reduction in depth of focus, in combination with the increasing distance between the target structures, may result in only one of the two target structures being in focus at a particular time. This decreases the accuracy of the metrology measurements significantly.